Advanced FPGA design : architecture, implementation, and optimization / Steve Kilt
Tipo de material: TextoDetalles de publicación: West Sussex : John Wiley & Sons, 2007 Descripción: XV, 336 p. : il, gráf. ; 25 cmISBN: 978-0-470-05437-6Tema(s): Procesado de señales -- Técnicas digitales | Circuitos integrados -- Diseño y construcciónResumen: This book provides the advanced issues of FPGA design as the underlying theme of the work. In practice, an engineer typically needs to be mentored for several years before these principles are appropriately utilized. The topics that will be discussed in this book are essential to designing FPGA's beyond moderate complexity. The goal of the book is to present practical design techniques that are otherwise only available through mentorship and real-world experience.Resumen: Índice: Author Bio. Acknowledgements. Dedication. Flowchart of Contents. Table of Contents. Preface. Chapter 1. Architecting Speed. High Throughput. Low Latency. Timing. Add Register Layers. Parallel Structures. Flatten Logic Structures. Register Balancing. Reorder Paths. Summary of Key Points. Chapter 2. Architecting Area. Rolling-up the Pipeline. Control Based Logic Reuse. Resource Sharing. Impact of Reset on Area. Resources without Reset. Resources without Set. Resources without Asynchronous Reset. Resetting RAM. Utilizing Set/Reset Flip-Flop Pins. Summary of Key Points. Chapter 3. Architecting Power. Clock Gat... Etc.Tipo de ítem | Biblioteca de origen | Signatura | URL | Estado | Fecha de vencimiento | Código de barras | Reserva de ítems |
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Monografías | 03. BIBLIOTECA INGENIERÍA PUERTO REAL | 621.39/KIL/ADV (Navegar estantería(Abre debajo)) | Texto completo | Prestado | 31/01/2025 | 3743024334 |
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Índice
Bibliografía: p. 319-320
This book provides the advanced issues of FPGA design as the underlying theme of the work. In practice, an engineer typically needs to be mentored for several years before these principles are appropriately utilized. The topics that will be discussed in this book are essential to designing FPGA's beyond moderate complexity. The goal of the book is to present practical design techniques that are otherwise only available through mentorship and real-world experience.
Índice: Author Bio. Acknowledgements. Dedication. Flowchart of Contents. Table of Contents. Preface. Chapter 1. Architecting Speed. High Throughput. Low Latency. Timing. Add Register Layers. Parallel Structures. Flatten Logic Structures. Register Balancing. Reorder Paths. Summary of Key Points. Chapter 2. Architecting Area. Rolling-up the Pipeline. Control Based Logic Reuse. Resource Sharing. Impact of Reset on Area. Resources without Reset. Resources without Set. Resources without Asynchronous Reset. Resetting RAM. Utilizing Set/Reset Flip-Flop Pins. Summary of Key Points. Chapter 3. Architecting Power. Clock Gat... Etc.
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